Fox Red Labs / Builds / Motor control, power and sensing

Measure how fast the chip runs, with CoreMark

Build the standard CoreMark benchmark, run it on the board and work out iterations per second. The same source runs on every board, so the numbers compare.

MediumNo wiring85 s to rerun

Parts and steps

Your board

You need

LP-MSPM0L1306 LaunchPad development kit Buy the board
Micro-USB data cable power and programming

Plug a micro-USB data cable into the debugger end of the MSPM0 L1306. No driver to install.
In Chrome or Edge, open the browser bench and click Connect.
Click Flash. The page writes the demo to the board.
You should see: A CoreMark score near 78.27 at 32 MHz, and where this chip sits among the boards we have measured.

Set up your computer once: 1 step. Done already? Start at step 2.

Install the tools once, all free.TERMINAL
- Get CCStudio 21.0.1 from TI's CCStudio download page (1.9 GB download, 8.1 GB installed, free myTI login). It brings TI Arm Clang 5.1.1.LTS.
- Get the MSPM0 SDK 2.11.00.07 from TI's MSPM0 SDK download page (0.4 GB download, 2.2 GB installed).
- Get SysConfig 1.26.3 (TI's SysConfig page, 0.96 GB installed).
- Get xPack OpenOCD 0.12.0-7 from its GitHub release page (2 MB; the file xpack-openocd-0.12.0-7-darwin-x64.tar.gz on an Intel Mac, xpack-openocd-0.12.0-7-darwin-arm64.tar.gz on Apple Silicon).
- Get the Zephyr SDK 0.17.4 Arm toolchain, toolchain_macos-x86_64_arm-zephyr-eabi.tar.xz, from the Zephyr SDK releases on GitHub. Unpack it into ~/zephyr-toolchain, as mspm0g3507/zephyr/setup-intel-mac.sh does. The run script uses its arm-zephyr-eabi-nm to find the result in RAM.
- Clone this repository into <repository folder>. CoreMark's source is in mspm0l1306/bench/coremark. This repo's scripts point at SysConfig 1.26.3. It came with the SimpleLink Wi-Fi SDK installer on the test Mac and sits in /Applications/ti/sysconfig_1.26.3. CCStudio 21.0.1 carries its own 1.28.1. This repo's scripts do not point at it.
You should see: /Applications/ti/ccs2101/ccs/tools/compiler/ti-cgt-armllvm_5.1.1.LTS/bin/tiarmclang --version prints 5.1.1, and ls ~/zephyr-toolchain/arm-zephyr-eabi/bin/arm-zephyr-eabi-nm finds the tool.

Plug the board into the Mac.BENCH
List your probe's serial number with xdsdfu -e, run from CCStudio's ccs_base/common/uscif/xds110/ folder. Then set it for this shell with export PROBE=<serial>. Every script flashes through mspm0l1306/tools/ocd.sh, which refuses to run without PROBE. Close any serial window open on the board.
/Applications/ti/ccs2101/ccs/ccs_base/common/uscif/xds110/xdsdfu -e
You should see: xdsdfu lists the probe and its serial number.
From the repository folder, go to the CoreMark folder and build at -O3 and 32 MHz.TERMINAL
cd mspm0l1306/bench/coremark ./build.sh O3 32
You should see: A build with no errors that leaves build-O3-32/coremark.out and its map.
Flash it, fill RAM with a pattern, run 16 seconds and read the result from RAM through the debugger.TERMINAL
No serial window is needed. The last number is how many seconds to let it run.
./run.sh O3 32 16
You should see: Correct operation validated, Iterations : 1000 and Total ticks : 408864304, or very close, and a stack line saying the stack stayed inside its reserved space. The line Iterations/Sec : 83 is rounded because float printing is off to save RAM.
Work out the score yourself: iterations divided by ticks at the clock speed.TERMINAL
You should see: 1k iterations divided by 408,864,304 ticks at 32 MHz is 78.27 per second, or 2.446 per MHz.

Or hand it to a coding assistant

Paste this in a terminal. It hands off to an AI assistant.

git clone --depth 1 --filter=blob:none https://github.com/Fox-Red-Labs/fox-red-labs.git && cd fox-red-labs
./start.sh mspm0l1306 speed-test --assistant claude

git clone --depth 1 --filter=blob:none https://github.com/Fox-Red-Labs/fox-red-labs.git && cd fox-red-labs
py start.py mspm0l1306 speed-test --assistant claude

It runs the steps above and reports what it saw.

Not Claude Code? Copy this prompt instead.

Clone https://github.com/Fox-Red-Labs/fox-red-labs and read mspm0l1306/AGENTS.md first. Then run Measure how fast a chip runs (CoreMark) on my LP-MSPM0L1306, following docs/builds/speed-test.md. Tell me when to plug in a board and what you saw at each step.

If something goes wrong

A tool lives elsewhere	Change the path at the top of `build.sh`, `run.sh` or `tools/ocd.sh`; the scripts expect each tool at the path set there.
You want to put the board back as it came	Read the out-of-box image before you flash anything; the folder `mspm0l1306/data` has the image read from the test board.
The build cannot find the SDK or compiler	The paths at the top of `build.sh` do not match your install.
The stack line says OVERFLOW	The score is not valid even if it looks plausible, because this chip has no memory protection.
The number is off by more than a few percent	Check `CPUCLK_FREQ` in the generated `ti_msp_dl_config.h`. Check the optimization level too: -Os and -Oz score 47.35 and 41.63. Then run it three times.

More troubleshooting

Your tick count differs from run to run

The setup is the cause: every recorded run, by hand and with an AI assistant, gave 408,864,304.

Every fix for this board: the FAQ.

What to build next

How fast a chip reacts to a signalHow many cycles from a signal to its handler, and one motor-control step timed

Dim an LED or move a servoThe LED dims up and down, or a hobby servo swings

Spin a brushless motorThe motor spins from a LaunchPad and a plug-on driver board, then runs closed loop on TI's FOC

Every build. The code for all of them is in the GitHub repository.

Evidence and limitsCoreMark on 11 TI microcontrollers, from 78 on the L1306 to 872 on the AM13E230. Ran on 2 boards. Results, sources, timing and limits.

Bare-metal CoreMark on the LP-MSPM0L1306

Expected result: CoreMark prints Correct operation validated and its tick count is 408,864,304 or very close, so the score works out to 78.27 per second at 32 MHz. Build and run take well under a minute.

What this shows

The MSPM0 L1306 scores 78.27 CoreMark per second, 2.446 per MHz, at 32 MHz with TI Arm Clang -O3 and no operating system. The run passes CoreMark's own correctness check.
Every saved run gave the same tick count, 408,864,304, so a different number points at the setup.

What this does not establish, and limits

What this does not establish

That other chips or compilers score the same. The comparison across boards is on the Benchmarks page. A different compiler or operating system changes the score: GCC 12.2.0 -O3 gave 54.62 on this board, and 59.70 under Zephyr.
The printed Iterations/Sec : 83 as the score: it is rounded; the score is computed from the ticks.
That this is an official EEMBC-certified result: it is this run of the unmodified EEMBC source, with a new port layer.

Limits to keep in mind

CoreMark's 2 kB work area sits on the stack, so the build reserves a 3 kB stack. The deepest use in this run was 2.9 kB, which leaves little room on a 4 kB chip.
The scripts hard-code Mac paths and the probe serial, and need the Zephyr SDK's nm.

Sources

Why this board

It is the board whose run is written out step by step with the number to expect. Its tick count was

Versions, sizes and timing

CoreMark	78.27 per second, 2.446 per MHz at 32 MHz, TI Arm Clang -O3; -Os 47.35, -Oz 41.63; at 4 MHz 2.631 per MHz (no flash wait state)
Ticks and iterations	1k iterations, 408,864,304 ticks in every saved run
Memory	4 kB of RAM, 3.9 kB used with 144 bytes spare; the stack reached 2.9 kB	README notes
Tools	MSPM0 SDK 2.11.00.07, TI Arm Clang 5.1.1.LTS, SysConfig 1.26.3, xPack OpenOCD 0.12.0-7

Evidence

Bare-metal CoreMark with TI Arm Clang -O3 at 32 MHz scored 78.27 per second (2.446 per MHz) on 2026-10-06, passing CoreMark's own check, with the stack inside its reserved space.
The raw printout of the saved run.
The commands and the number to expect are written in the board's run-the-tests page.

Other boards

MSPM0G3507, MSPM0G3519, MSPM0G5187Could work should work
MSPM33C321A, AM13E230Could work could work
CC2340R5, CC1354P10, CC2755P10, CC35X1ran another way
F2800137, TDA4VMcould work
MSPM0C1104Not for this chip can't run it

What the status words mean

Works ran here and did what it shouldCould work some of it ran; real porting effort is left; hover for whatNot for this chip the chip or its vendor software cannot; hover for why

Bare-metal CoreMark on the LP-EM-CC2340R5

Expected result: The serial report ends in BENCH DONE and shows CoreMark passing its own check at about 111 iterations per second at 48 MHz.

What this shows

The CC2340R5 scores 111.09 CoreMark per second, 2.31 per MHz, at 48 MHz with TI Arm Clang -O3 and no operating system.
Within 1% per MHz of the MSPM0 G3507 at full speed, which has the same core and compiler and scores 2.30 per MHz at 80 MHz.

What this does not establish, and limits

What this does not establish

A repeat: each build was run once, so the score is a single measurement.
That the compiler alone explains the gap to Zephyr with GCC on the same chip, which scored 84.07. That comparison changes the compiler, the operating system and Zephyr's timer setup at once.
An official EEMBC-certified result.

Limits to keep in mind

The probe is a second board to buy; the CC2340R5 cannot be powered or flashed without one.
UniFlash's verify (-v) reports a mismatch in the boot configuration area on this chip, so the script flashes without it.

Sources

Versions, sizes and timing

CoreMark	111.09 per second at -O3 (2.31 per MHz), 57.54 at -Oz; both pass CoreMark's own check (crcfinal 0x4983)	README notes
Clock	48 MHz, read back as 48 MHz from the SDK; a 0.3 s host-timed check of the cycle counter gave 48.02 and 48.07 MHz	README notes
Flash use	36.8 kB for the -O3 build, 25.6 kB for -Oz; code runs from flash with 2 wait states and the cache on	README notes
Tools	SimpleLink Low Power F3 SDK 9.21.00.36 LTS, CCStudio 21.0.1 (for TI Arm Clang 5.1.1 LTS), SysConfig 1.26.3 and UniFlash 9.6.0, in `/Applications/ti/`. SysConfig 1.26.3 came with the SimpleLink Wi-Fi SDK installer. CCStudio 21.0.1 carries its own 1.28.1, which this repo's scripts do not point at.	README notes

Evidence

Bare-metal CoreMark with TI Arm Clang 5.1.1 scored 111.09 per second at -O3 (2.31 per MHz at 48 MHz) on 2026-10-05, passing CoreMark's own check; measured once. README notes
The saved serial capture of the -O3 run.

Other boards

F2800137Could work ran in part
CC2755P10, CC1354P10Could work should work
CC35X1Could work could work
MSPM0G3507, MSPM0L1306, MSPM0G5187, MSPM0G3519, MSPM33C321A, AM13E230, TDA4VMran another way
MSPM0C1104Not for this chip can't run it

What the status words mean

Works ran here and did what it shouldCould work some of it ran; real porting effort is left; hover for whatNot for this chip the chip or its vendor software cannot; hover for why

Result grid

Project

LP-MSPM0G3507MSPM0G3507 chip

LP-MSPM0L1306MSPM0L1306 chip

LP-EM-CC2340R5CC2340R52 chip

LAUNCHXL-F2800137TMS320F2800137 chip

Measure how fast a chip runs (CoreMark)

LP-MSPM0G3507WorksCoreMark 183.6 at 80 MHz

LP-MSPM0L1306WorksCoreMark 78.3 at 32 MHz

LP-EM-CC2340R5WorksCoreMark 111.1 at 48 MHz LP-EM-CC2340R5 baremetal notes

LAUNCHXL-F2800137Could workCoreMark 155.3 at 120 MHz with a patch for the 16-bit byte (unofficial); unmodified it does not validate

Works ran here and did what it shouldShould work it builds; only naming, packaging or build glue is in the way; hover for whichCould work some of it ran; real porting effort is left; hover for whatNot for this chip the chip or its vendor software cannot; hover for why

Experiments (13)

Status	What was tried	Result
	Is the TI LP-AM13E230 faster than a C2000 on the C2000's own motor-control code? AM13E230, 2026-10-08	One FOC step takes 117 cycles (0.585 us at 200 MHz) with the TMU, 3.1 times faster in time than the C2000 F2800137's 1.84 us. The trigger-to-PWM loop is not measured.
Works	Does ST's AES example run as shipped on the ST NUCLEO-U083RC (STM32U083), and how much faster is the hardware AES than software? NUCLEO-U083RC, 2026-10-08	ST's CRYP_AESModes example ran as shipped on the NUCLEO-U083RC and passed its own checks (LD4 steady on); its README promises 192-bit keys that the code and the chip do not have. This repo's own timing put the AES...
Works	Can a program on the ST NUCLEO-U083RC (STM32U083) use all 40 kB of RAM, or only the 32 kB ST's examples give it? NUCLEO-U083RC, 2026-10-08	All 40 kB of the STM32U083's RAM works as one block from 0x20000000 to 0x2000A000; ST's linker scripts (206 of 209 for this board) and Zephyr's default give programs only 32 kB. A program linked for 40 kB filled and...
Works	How much does the flash wait state cost the ST NUCLEO-U083RC (STM32U083) at 48 MHz? NUCLEO-U083RC, 2026-10-08	On the NUCLEO-U083RC, CoreMark per MHz with one flash wait state at 48 MHz (2.03) is within 1.3 percent of the reset clock with none (2.05); suspected cause, not tested: the instruction cache.
Not for this chip	How much of CoreMark runs on a TI LP-MSPM0C1104 with 1 kB of RAM? MSPM0 C1104, 2026-10-08	The standard CoreMark does not link for the MSPM0 C1104; reduced 400 and 200 byte data sets link and flash, then hard fault with the stack pointer below RAM.
Works	How much does it cost to run code from flash on the LP-AM263P, and do TI's AI models care? AM263P, 2026-10-10	Running code straight from the AM263P's flash works with only the USB cable. TI's own memcpy benchmark takes 8.7 times as long as from RAM with no extra cache and 2.4 times with TI's 64 kB cache; with smart...
Works	How fast is the same current loop on the LP-AM263P (AM263P4), LP-AM13E230 and LAUNCHXL-F2800137? AM263P, 2026-10-11	The same motor-control step (one current-loop pass, F28-style C code, sine and cosine on each chip's TMU) runs trigger-to-new-PWM in a mean 1.24 µs on the AM263P (400 MHz Cortex-R5F), 1.33 µs on the AM13E230...
Works	Does lockstep, or a busy neighbour core, slow the LP-AM263P's control loop? AM263P, 2026-10-11	The AM263P's R5F cores ran in lockstep from the debugger (the lockstep status bit set on both clusters, both checker cores refused a debug connection), at the same speed as split mode except 3 cycles on one build:...
Works	How much faster is the Cortex-M33 than the Hazard3 RISC-V core on the same Pico 2 chip? Raspberry Pi Pico 2 H, 2026-10-11	On the Pico 2 at 150 MHz Hazard3 beats the Cortex-M33 on integer CoreMark (495.2 against 437.6 at -O3) and loses 15 to 1 on a floating-point control step (4.5k against 308 cycles).
Works	Does code in external flash cost anything on the Pico 2 with a 16 kB cache? Raspberry Pi Pico 2 H, 2026-10-11	CoreMark is the same from RAM and flash within 0.3 percent; the 30k occupancy model runs 4.3 percent (Cortex-M33) and 6.0 percent (Hazard3) faster from RAM.
	Does NXP's fixed-point library fix the FRDM-MCXA153's missing floating-point unit for motor control? FRDM-MCXA153, 2026-10-11	On the FRDM-MCXA153 (Cortex-M33, no FPU) NXP's fixed-point RTCESL library does one motor-control step in 448 cycles, against 5.4k cycles for the same job in float; timed only, the output was not compared with the...
	What is the smallest TI chip that runs the real Doom engine? The LP-MSPM33C321A, with a smaller engine design MSPM33 C321A, 2026-10-20	The plain Doom engine links for the MSPM33 C321A but needs 164 kB of static data plus an 800 kB zone. The rp2040-doom design (m33-whx) finishes all three shareware demos on the chip's real 256 kB with a software...
	Can the LP-MSPM33C321A's QSPI flash be dumped safely and hold the Doom data file? MSPM33 C321A, 2026-10-21	The board's QSPI flash was read twice with the SDK read path (identical, 16 MB part), the Doom data file was written into a blank run of it without touching the out-of-box video, and the rp2040-doom engine ran all...

Source files

LP-EM-CC2340R5 baremetal notes (CC2340R5)

Get the code and tell us how it wentThe clone command, the board folder with its AGENTS.md, reports from others, and the three report forms.

Get the code

Clone the repository and open the board's folder below. AGENTS.md is a plain text file of notes for AI coding assistants, and llms.txt at the root indexes the site for one.

git clone https://github.com/Fox-Red-Labs/fox-red-labs.git

LP-MSPM0G3507: folder mspm0g3507/.
- README: the board's lab notebook (what was run, in order)
- Notes for an AI coding assistant working in this repository: notes for an AI assistant; copy it into your own project if you use one
- FAQ: errors and fixes
The other 3 board folders
- LP-MSPM0L1306: folder mspm0l1306/.
  - README: the board's lab notebook (what was run, in order)
  - Notes for an AI coding assistant working in this repository: notes for an AI assistant; copy it into your own project if you use one
  - FAQ: errors and fixes
- LP-EM-CC2340R5: folder cc2340r5/.
  - README: the board's lab notebook (what was run, in order)
  - Notes for an AI coding assistant working in this repository: notes for an AI assistant; copy it into your own project if you use one
  - FAQ: errors and fixes
- LAUNCHXL-F2800137: folder c2000-launchpad/.
  - README: the board's lab notebook (what was run, in order)
  - Notes for an AI coding assistant working in this repository: notes for an AI assistant; copy it into your own project if you use one
  - FAQ: errors and fixes

Code is BSD-3-Clause, writing is CC BY 4.0; third-party folders keep their own licenses.

Built it? Tell us

Built this, or got stuck? Report it on GitHub with a few short answers. Your report shows here in your words, marked as yours. A failure that repeats on the bench gets its fix here.

Share a projectWhat you built or ported, what it runs on, a photo or a clip, and anything that did not work.Report a problemThe step, the exact error text, your tool versions. Once it repeats on the bench, the fix goes on the page.A prompt that workedWhat you typed and what came out.

Your tools live elsewhere	Change the paths at the top of `baremetal/run.sh`.
A flash later fails with `The target failed to see a correctly formatted SWD header` (error -615)	Unplug the cable, pull the probe off the board, press it back on and plug in again.
The script says a CCFG permission is not `CCFG_PERMISSION_ALLOW`	It did not flash on purpose; a wrong setting there can lock the chip.
The serial port looks silent	Check the port name in `SERIAL_DEV` and read at 115200. `screen /dev/cu.usbmodemLS470GTU1 115200` shows the report by hand; quit with Ctrl-A then K.