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Hardware / Runs Linux / Step 2 of 2

SK-TDA4VM (TDA4VM)

The TDA4VM is a processor in TI's Jacinto 7 (J721E) family: 2x Cortex-A72 at 2.0 GHz, 64 MB of flash, 4 GB of RAM.

The SK-TDA4VM on the bench

Quick facts

BoardSK-TDA4VM
ChipTDA4VM
Core2x Cortex-A72 at 2.0 GHz, C7x DSP with an 8 TOPS matrix accelerator (MMA), 2x C66x DSP, 6x Cortex-R5F
Clock2 GHz
Flash64 MB
RAM4 GB
RadioNone
Notable peripheralsDeep-learning accelerator (C7x and MMA); Hardware H.264 and H.265 decode, H.264 encode; Two CSI-2 camera ports; Gigabit Ethernet; HDMI and DisplayPort; Micro-SD boot
On-board debug probeNone for the cores; a four-port serial console over micro-B (CP2108)
Where to buyTI.com
Toolchains that ranGCC, Linux

Get it running

  1. Backup: The SD card is the board's state and the image is its backup: tisdk-edgeai-image-j721e-evm.wic.xz (1.12 GB, SHA-256 7bebcff62930c93bc0d10462385a936305ffdfd2457c4bbd85c2b2f216076da0, from the SK-TDA4VM software page, no login). The box card was never read back, so there is no tested backup of its contents. Check a download with xz -t
  2. Write the card: With a reader: tda4/tools/write-card.sh diskN path/to/image.wic.xz (refuses the internal disk, destroys the card). With none: the "No-reader path" in tda4/README.md
  3. Boot: SW1 all OFF, open the console first, power on. Login root, no password, 115200 8N1
  4. Check: The login: prompt. First boot 27.7 s, bootloader to login. python3 tda4/tools/warm_boot.py <n> times warm boots
  5. First model: Models are in /opt/model_zoo, one folder each with artifacts and param.yaml. Push tda4/bench/zoo/tvm_bench.py with tda4/tools/push_serial.py and run it; the runtime log lists every node on the C7x (274 of 274 for the pose model)

You should see: a login: prompt on the serial console, 27.7 s after power-on on the first boot. Login is root with no password.

Every step, with the setup: the board's README.

What works

  • CoreMark: 19,579.9 (GCC, Linux, -O3; 3 runs)
  • Room-occupancy AI model, one inference: 0.0174 ms (GCC, -O3; 2000 MHz; 3 runs)
  • Memory bandwidth, STREAM-style triad: 5,385 MB/s (GCC, Linux; 2000 MHz; 2 runs)
  • Dhrystone 2.1: 5.263 DMIPS/MHz (GCC, Linux, -O3; 2000 MHz; 3 runs)

Download every result for this board (CSV), or compare it on this board on the Benchmarks page.

Projects and ports that ran here

Fixes

  • If you see All four ports silent, a reset changes nothing, check SW1 and the port, then write the image.
  • If you see Console silent after the USB cable moved, probe all four ports (tda4/tools/conlog.py) or set TDA4_PORT.
  • If you see Shell stuck at a > prompt after a file push, wrap base64 at 76 columns; use tda4/tools/push_serial.py.
  • If you see spl: ymodem err - Timed out during UART boot, use the current tda4/tools/uart_boot.py.
  • If you see Failed to start Start psplash boot splash screen and Direct firmware load for j7-mcu-r5f0_1-fw failed with error -2, ignore both.
  • If you see [ERROR] Error pulling frame from GST Pipeline, concatenate the clip to itself (20 copies).
  • If you see ALG_PERR: ... e_afalg.c(463): Failed to bind socket : No such file or directory, use the A72 crypto instructions (AES-128-CBC 1.49 GB/s) or /dev/crypto.
  • If you see 'FLAGS_STR' undeclared (CoreMark), add -DFLAGS_STR='"-O3"' and EEMBC's core_portme_posix_overrides.h.

Every fix for this board, with the exact error text

How long an AI assistant took here

4 jobs timed with an AI coding assistant on this board, with the board's notes and without. Time is the median of the runs; passed means a person or a script checked the result. No spend or token counts here.

JobAssistantNotes givenTimePassed
coremarkSonnet 5.5without them6.8 min1 of 1
coremarkSonnet 5.5with the board's notes3.8 min1 of 1
inferenceSonnet 5.5without them2.1 min1 of 1
inferenceSonnet 5.5with the board's notes2.7 min1 of 1

For AI assistants

Point your assistant at this board's AGENTS.md (build, flash and fix notes) and the repository's llms.txt (the index).

Sources: tda4/README.md, tda4/AGENTS.md, tda4/FAQ.md, data/results/tda4.csv, site/data/portfolio.json, site/data/projects.json, site/data/ports.json.